1. Field of the Invention
The present invention relates to a successive approximation register analog-to-digital converter and a conversion time calibration method thereof. More particularly, the present invention relates to a successive approximation register analog-to-digital converter capable of calibrating a conversion time and a conversion time calibration method thereof.
2. Descriptions of the Related Art
Analog-to-digital converters can convert successive analog signal into discrete digital signals. Among those analog-to-digital converters, successive approximation register analog-to-digital converters have found more and more applications in recent years.
However, under different process, voltage, and temperature (PVT) variations, conversion times taken by a successive approximation register analog-to-digital converter to convert analog voltages into digital voltages may significantly vary from each other. In terms of the conversion time of the successive approximation register analog-to-digital converter, the PVT variation may cause a problem no matter whether it results in increase of the conversion time or decrease of the conversion time. When the PVT variation results in increases of the conversion time of the successive approximation register analog-to-digital converter, an incomplete conversion process may be caused because the conversion time is longer than a rated conversion time; and when the PVT variation results in decrease of the conversion time of the successive approximation register analog-to-digital converter, an inaccurate conversion result may be caused because of the too fast conversion process.
To solve the problem that the PVT variation may increase the conversion time, the conventional successive approximation register analog-to-digital converter often must be over-designed according to a relatively high speed in order to make the performance of the successive approximation register analog-to-digital converter stable. However, this practice of over-design will cause waste in area or power consumption of the circuit.
On the other hand, to solve the problem that the PVT variation may decrease the conversion time, the conventional successive approximation register analog-to-digital converter must be provided with a more accurate time synchronization function during design so as to overcome the problem of the inaccurate conversion result. However, having the more accurate time synchronization function will cause a burden on the cost.
Accordingly, an urgent need exists in the art to improve the problem that the PVT variations may cause abnormal changes in conversion time of the conventional successive approximation register analog-to-digital converter so that the conventional successive approximation register analog-to-digital converter still has an approximately constant conversion time under different PVT variations.